A wiring substrate includes an insulating layer, a pad, and a solder resist layer. The insulating layer has a first surface formed with a first recess portion. The pad is embedded in the first recess portion. The pad includes a second surface and a third surface. The third surface that is located at a lower position than the first surface so as to expose an inner wall surface of the first recess portion. The pad is formed with a second recess portion in a center portion of the third surface. The solder resist layer is provided on the first surface. An adjacent portion of the first surface to a peripheral portion of the first recess portion is smaller in roughness than a region of the first surface peripheral to the adjacent portion of the first surface.