Invention Grant
US09252092B2 Semiconductor device and method of forming through mold hole with alignment and dimension control
有权
半导体器件及其形成方法,通过对准和尺寸控制的模具孔
- Patent Title: Semiconductor device and method of forming through mold hole with alignment and dimension control
- Patent Title (中): 半导体器件及其形成方法,通过对准和尺寸控制的模具孔
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Application No.: US13950122Application Date: 2013-07-24
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Publication No.: US09252092B2Publication Date: 2016-02-02
- Inventor: Yaojian Lin , Kang Chen , Yu Gu
- Applicant: STATS ChipPAC, Ltd.
- Applicant Address: SG Singapore
- Assignee: STATS ChipPAC, Ltd.
- Current Assignee: STATS ChipPAC, Ltd.
- Current Assignee Address: SG Singapore
- Agency: Patent Law Group: Atkins and Associates, P.C.
- Agent Robert D. Atkins
- Main IPC: H01L21/00
- IPC: H01L21/00 ; H01L23/48 ; H01L23/498 ; H01L21/66 ; H01L23/00

Abstract:
A semiconductor device includes a semiconductor die and an encapsulant formed over a first surface of the semiconductor die and around the semiconductor die. A first insulating layer is formed over a second surface of the semiconductor die opposite the first surface. A plurality of conductive vias is formed through the first insulating layer. A conductive pad is formed over the encapsulant. An interconnect structure is formed over the semiconductor die and encapsulant. A first opening is formed in the encapsulant to expose the conductive vias. The conductive vias form a conductive via array. The conductive via array is inspected through the first opening to measure a dimension of the first opening and determine a position of the first opening. The semiconductor device is adjusted based on a position of the conductive via array. A conductive material is formed in the first opening over the conductive via array.
Public/Granted literature
- US20150028471A1 Semiconductor Device and Method of Forming Through Mold Hole with Alignment and Dimension Control Public/Granted day:2015-01-29
Information query
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