Invention Grant
- Patent Title: Wiring substrate and semiconductor device
- Patent Title (中): 接线基板和半导体器件
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Application No.: US14548784Application Date: 2014-11-20
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Publication No.: US09257386B2Publication Date: 2016-02-09
- Inventor: Hiromu Arisaka , Noriyoshi Shimizu , Masato Tanaka , Tetsuya Koyama , Akio Rokugawa
- Applicant: SHINKO ELECTRIC INDUSTRIES CO., LTD.
- Applicant Address: JP Nagano-shi, Nagano-ken
- Assignee: Shinko Electric Industries Co., Ltd.
- Current Assignee: Shinko Electric Industries Co., Ltd.
- Current Assignee Address: JP Nagano-shi, Nagano-ken
- Agency: Fish & Richardson P.C.
- Priority: JP2013264672 20131220
- Main IPC: H01L23/31
- IPC: H01L23/31 ; H01L23/498 ; H01L25/10 ; H05K1/11 ; H05K1/02 ; H05K1/03 ; H01L21/00

Abstract:
A wiring substrate includes first and second wiring structures. The first wiring structure includes a core substrate, first and second insulation layers each formed from a thermosetting insulative resin including a reinforcement material, and a via wire formed in the first insulation layer. The second wiring structure includes a wiring layer formed on upper surfaces of the first insulation layer and the via wire, an insulation layer formed on the upper surface of the first insulation layer, and an uppermost wiring layer including a pad used to electrically connect a semiconductor chip and the wiring layer. An outermost insulation layer stacked on a lower surface of the second insulation layer exposes a portion of a lowermost wiring layer stacked on the lower surface of the second insulation layer as an external connection pad. The second wiring structure has a higher wiring density than the first wiring structure.
Public/Granted literature
- US20150179560A1 Wiring Substrate and Semiconductor Device Public/Granted day:2015-06-25
Information query
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