Invention Grant
- Patent Title: Inverse PCP flow remapping for PFC pause frame generation
- Patent Title (中): 用于PFC暂停帧生成的逆PCP流重映射
-
Application No.: US14321762Application Date: 2014-07-01
-
Publication No.: US09258256B2Publication Date: 2016-02-09
- Inventor: Joseph M. Lamb
- Applicant: Netronome Systems, Inc.
- Applicant Address: US CA Santa Clara
- Assignee: Netronome Systems, Inc.
- Current Assignee: Netronome Systems, Inc.
- Current Assignee Address: US CA Santa Clara
- Agency: Imperium Patent Works LLP
- Agent T. Lester Wallace; Mark D. Marrello
- Main IPC: G06F13/00
- IPC: G06F13/00 ; G06F13/18 ; G06F13/362 ; H04L12/70 ; H04L12/931 ; H04L12/861 ; H04L12/947

Abstract:
An overflow threshold value is stored for each of a plurality of virtual channels. A link manager maintains, for each virtual channel, a buffer count. If the buffer count for a virtual channel is detected to exceed the overflow threshold value for a virtual channel whose originating PCP flows were merged, then a PFC (Priority Flow Control) pause frame is generated where multiple ones of the priority class enable bits are set to indicate that multiple PCP flows should be paused. For the particular virtual channel that is overloaded, an Inverse PCP Remap LUT (IPRLUT) circuit performs inverse PCP mapping, including merging and/or reordering mapping, and outputs an indication of each of those PCP flows that is associated with the overloaded virtual channel. Associated physical MAC port circuitry uses this information to generate the PFC pause frame so that the appropriate multiple enable bits are set in the pause frame.
Public/Granted literature
- US20160006677A1 INVERSE PCP FLOW REMAPPING FOR PFC PAUSE FRAME GENERATION Public/Granted day:2016-01-07
Information query