Invention Grant
- Patent Title: IC tap with dual port router and additional update input
- Patent Title (中): 具有双端口路由器的IC抽头和附加的更新输入
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Application No.: US14547830Application Date: 2014-11-19
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Publication No.: US09261559B2Publication Date: 2016-02-16
- Inventor: Lee D. Whetsel
- Applicant: Texas Instruments Incorporated
- Applicant Address: US TX Dallas
- Assignee: TEXAS INSTRUMENTS INCORPORATED
- Current Assignee: TEXAS INSTRUMENTS INCORPORATED
- Current Assignee Address: US TX Dallas
- Agent Lawrence J. Bassuk; Frank D. Cimino
- Main IPC: G01R31/3177
- IPC: G01R31/3177 ; G01R31/3185
Abstract:
This disclosure describes a test architecture that supports a common approach to testing individual die and dies in a 3D stack arrangement. The test architecture uses an improved TAP design to facilitate the testing of parallel test circuits within the die.
Public/Granted literature
- US20150082110A1 3D STACKED DIE TEST ARCHITECTURE Public/Granted day:2015-03-19
Information query
