Invention Grant
- Patent Title: Bonding wire to bonding pad
- Patent Title (中): 将导线接合到焊盘
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Application No.: US14711014Application Date: 2015-05-13
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Publication No.: US09293436B2Publication Date: 2016-03-22
- Inventor: Toshihiko Akiba , Akihiro Tobita , Yuki Yagyu
- Applicant: RENESAS ELECTRONICS CORPORATION
- Applicant Address: JP Tokyo
- Assignee: RENESAS ELECTRONICS CORPORATION
- Current Assignee: RENESAS ELECTRONICS CORPORATION
- Current Assignee Address: JP Tokyo
- Agency: McDermott Will & Emery LLP
- Priority: JP2014-100434 20140514
- Main IPC: H01L21/44
- IPC: H01L21/44 ; H01L23/48 ; H01L23/00 ; H01L21/48

Abstract:
A manufacturing method of a BGA, includes the steps of: providing a semiconductor chip having electrode pads; and removing a natural oxide film formed on the surface of each of the electrode pads. Further, a first film comprised of a conductive member is formed on the surface of the electrode pad exposed by removing the natural oxide film, a wire is connected with the first film, and part of the wire is brought into contact with the electrode pad to form an alloy layer at the interface between the wire and the electrode pad. The crystal structure of the first film is comprised of a body-centered cubic lattice or a hexagonal close-packed lattice. The cost of the semiconductor device can be reduced while the bonding reliability of wire bonding of the semiconductor device is ensured.
Public/Granted literature
- US20150333030A1 MANUFACTURING METHOD OF SEMICONDUCTOR DEVICE AND SEMICONDUCTOR DEVICE Public/Granted day:2015-11-19
Information query
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