Invention Grant
US09299580B2 High aspect ratio plasma etch for 3D NAND semiconductor applications
有权
用于3D NAND半导体应用的高纵横比等离子体蚀刻
- Patent Title: High aspect ratio plasma etch for 3D NAND semiconductor applications
- Patent Title (中): 用于3D NAND半导体应用的高纵横比等离子体蚀刻
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Application No.: US14462817Application Date: 2014-08-19
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Publication No.: US09299580B2Publication Date: 2016-03-29
- Inventor: Byungkook Kong , Gene Lee , Liming Yang
- Applicant: Applied Materials, Inc.
- Applicant Address: US CA Santa Clara
- Assignee: APPLIED MATERIALS, INC.
- Current Assignee: APPLIED MATERIALS, INC.
- Current Assignee Address: US CA Santa Clara
- Agency: Patterson & Sheridan, LLP
- Main IPC: H01L21/20
- IPC: H01L21/20 ; H01L21/311 ; H01L27/115

Abstract:
Embodiments of the present disclosure provide methods for forming features in a film stack that may be utilized to form stair-like structures with accurate profiles control in manufacturing three dimensional (3D) stacking of semiconductor chips. In one example, a method of etching a material layer disposed on a substrate using synchronized RF pulses includes providing an etching gas mixture into a processing chamber having a film stack disposed on a substrate, synchronously pulsing a RF source power and a RF bias power into the etching gas mixture at a ratio of less than 0.5, and etching the film stack disposed on the substrate.
Public/Granted literature
- US20160056050A1 HIGH ASPECT RATIO PLASMA ETCH FOR 3D NAND SEMICONDUCTOR APPLICATIONS Public/Granted day:2016-02-25
Information query
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