Invention Grant
US09299580B2 High aspect ratio plasma etch for 3D NAND semiconductor applications 有权
用于3D NAND半导体应用的高纵横比等离子体蚀刻

High aspect ratio plasma etch for 3D NAND semiconductor applications
Abstract:
Embodiments of the present disclosure provide methods for forming features in a film stack that may be utilized to form stair-like structures with accurate profiles control in manufacturing three dimensional (3D) stacking of semiconductor chips. In one example, a method of etching a material layer disposed on a substrate using synchronized RF pulses includes providing an etching gas mixture into a processing chamber having a film stack disposed on a substrate, synchronously pulsing a RF source power and a RF bias power into the etching gas mixture at a ratio of less than 0.5, and etching the film stack disposed on the substrate.
Information query
Patent Agency Ranking
0/0