High aspect ratio plasma etch for 3D NAND semiconductor applications
    1.
    发明授权
    High aspect ratio plasma etch for 3D NAND semiconductor applications 有权
    用于3D NAND半导体应用的高纵横比等离子体蚀刻

    公开(公告)号:US09299580B2

    公开(公告)日:2016-03-29

    申请号:US14462817

    申请日:2014-08-19

    Abstract: Embodiments of the present disclosure provide methods for forming features in a film stack that may be utilized to form stair-like structures with accurate profiles control in manufacturing three dimensional (3D) stacking of semiconductor chips. In one example, a method of etching a material layer disposed on a substrate using synchronized RF pulses includes providing an etching gas mixture into a processing chamber having a film stack disposed on a substrate, synchronously pulsing a RF source power and a RF bias power into the etching gas mixture at a ratio of less than 0.5, and etching the film stack disposed on the substrate.

    Abstract translation: 本公开的实施例提供了用于形成膜堆叠中的特征的方法,其可以用于在制造半导体芯片的三维(3D)堆叠中形成具有精确轮廓控制的阶梯状结构。 在一个示例中,使用同步RF脉冲蚀刻设置在基板上的材料层的方法包括:将蚀刻气体混合物提供到具有设置在基板上的膜堆叠的处理室中,将RF源功率和RF偏置功率同步地脉冲 蚀刻气体混合物的比例小于0.5,并蚀刻设置在基底上的薄膜叠层。

    Highly selective etching methods for etching dielectric materials
    2.
    发明授权
    Highly selective etching methods for etching dielectric materials 有权
    用于蚀刻电介质材料的高选择性蚀刻方法

    公开(公告)号:US09595451B1

    公开(公告)日:2017-03-14

    申请号:US14887254

    申请日:2015-10-19

    CPC classification number: H01L21/31116 H01L21/31144

    Abstract: Methods for forming high aspect ratio features using an etch process are provided. In one embodiment, a method for etching a dielectric layer to form features in the dielectric layer includes (a) supplying an etching gas mixture during a first mode to etch a portion of a dielectric layer disposed on a substrate while forming a passivation protection in the dielectric layer, wherein the dielectric layer is etched through openings defined in a patterned mask layer disposed on the dielectric layer, (b) supplying an etching gas mixture during a second mode to continue forming the passivation protection in the dielectric layer without etching the dielectric layer, and repeatedly performing (a) and (b) to form features in the dielectric layer until a surface of the substrate is exposed.

    Abstract translation: 提供了使用蚀刻工艺形成高纵横比特征的方法。 在一个实施例中,用于蚀刻电介质层以在电介质层中形成特征的方法包括(a)在第一模式期间提供蚀刻气体混合物以蚀刻布置在衬底上的介电层的一部分,同时在 电介质层,其中通过限定在设置在电介质层上的图案化掩模层中限定的开口蚀刻电介质层,(b)在第二模式期间提供蚀刻气体混合物,以在电介质层中继续形成钝化保护,而不蚀刻介电层 并且重复地执行(a)和(b)以形成电介质层中的特征,直到基板的表面露出。

Patent Agency Ranking