发明授权
- 专利标题: Constrained epitaxial source/drain regions on semiconductor-on-insulator finFET device
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申请号: US14225769申请日: 2014-03-26
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公开(公告)号: US09299780B2公开(公告)日: 2016-03-29
- 发明人: Brian J. Greene , Arvind Kumar , Dan M. Mocuta
- 申请人: International Business Machines Corporation
- 申请人地址: US NY Armonk
- 专利权人: INTERNATIONAL BUSINESS MACHINES CORPORATION
- 当前专利权人: INTERNATIONAL BUSINESS MACHINES CORPORATION
- 当前专利权人地址: US NY Armonk
- 代理机构: Cantor Colburn LLP
- 代理商 Steven Meyers
- 主分类号: H01L29/78
- IPC分类号: H01L29/78 ; H01L29/08 ; H01L29/66 ; H01L29/06 ; H01L29/16 ; H01L29/165
摘要:
A method of fabricating a semiconductor device includes forming a plurality of semiconductor fins on an insulator layer of a semiconductor substrate, and forming a plurality of gate stacks on the insulator layer. Each gate stack wraps around a respective portion of the semiconductor fins. The method further includes forming a dielectric layer on the insulator layer. The dielectric layer fills voids between the semiconductor fins and gate stacks, and covers the semiconductor fins. The method further includes etching at least one portion of the semiconductor fins until reaching the insulator layer such that at least one cavity is formed. The cavity exposes seed regions of the semiconductor fins located between adjacent gate stacks. The method further includes epitaxially growing a semiconductor material from the seed regions to form source/drain regions corresponding to a respective gate stack.
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