Invention Grant
US09305184B2 Packet-processing scheduler, security context, authentication, packet header, air cipher subsystem 有权
分组处理调度器,安全上下文,认证,分组报头,空中密码子系统

Packet-processing scheduler, security context, authentication, packet header, air cipher subsystem
Abstract:
An electronic circuit (200) includes one or more programmable control-plane engines (410, 460) operable to process packet header information and form at least one command, one or more programmable data-plane engines (310, 320, 370) selectively operable for at least one of a plurality of cryptographic processes selectable in response to the at least one command, and a programmable host processor (100) coupled to such a data-plane engine (310) and such a control-plane engine (410). Other processors, circuits, devices and systems and processes for their operation and manufacture are disclosed.
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