Invention Grant
US09318579B2 Method for making a semiconductor device while avoiding nodules on a gate
有权
制造半导体器件同时避免栅极上的结节的方法
- Patent Title: Method for making a semiconductor device while avoiding nodules on a gate
- Patent Title (中): 制造半导体器件同时避免栅极上的结节的方法
-
Application No.: US14300506Application Date: 2014-06-10
-
Publication No.: US09318579B2Publication Date: 2016-04-19
- Inventor: Qing Liu , Ruilong Xie , Xiuyu Cai , Kejia Wang , Chun-chen Yeh
- Applicant: STMICROELECTRONICS, INC. , GLOBALFOUNDRIES Inc. , INTERNATIONAL BUSINESS MACHINES CORPORATION
- Applicant Address: US TX Coppell KY Grand Cayman US NY Armonk
- Assignee: STMICROELECTRONICS, INC.,GLOBALFOUNDRIES INC,INTERNATIONAL BUSINESS MACHINES CORPORATION
- Current Assignee: STMICROELECTRONICS, INC.,GLOBALFOUNDRIES INC,INTERNATIONAL BUSINESS MACHINES CORPORATION
- Current Assignee Address: US TX Coppell KY Grand Cayman US NY Armonk
- Agency: Allen, Dyer, Doppelt, Milbrath & Gilchrist, P.A.
- Main IPC: H01L29/66
- IPC: H01L29/66 ; H01L29/78 ; H01L21/28
Abstract:
A method for making a semiconductor device includes forming laterally spaced-apart semiconductor fins above a substrate, and a gate overlying the semiconductor fins. The gate has a tapered outer surface. A first pair of sidewall spacers is formed adjacent the gate an exposed tapered outer surface is also defined. Portions of the gate are removed at the exposed tapered outer surface to define a recess. A second pair of sidewall spacers is formed covering the first pair of sidewall spacers and the recess. Source/drain regions are formed on the semiconductor fins.
Public/Granted literature
- US20150357441A1 METHOD FOR MAKING A SEMICONDUCTOR DEVICE WHILE AVOIDING NODULES ON A GATE Public/Granted day:2015-12-10
Information query
IPC分类:
