Invention Grant
- Patent Title: Structures and devices including a tensile-stressed silicon arsenic layer and methods of forming same
- Patent Title (中): 包括拉伸应力硅砷层的结构和器件及其形成方法
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Application No.: US14018345Application Date: 2013-09-04
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Publication No.: US09324811B2Publication Date: 2016-04-26
- Inventor: Keith Doran Weeks
- Applicant: ASM IP Holding B.V.
- Applicant Address: NL Almere
- Assignee: ASM IP Holding B.V.
- Current Assignee: ASM IP Holding B.V.
- Current Assignee Address: NL Almere
- Agency: Snell & Wilmer LLP
- Main IPC: H01L21/336
- IPC: H01L21/336 ; H01L29/267 ; H01L21/02 ; H01L29/10 ; H01L21/67
Abstract:
Structures including a tensile-stressed silicon arsenic layer, devices including the structures, and methods of forming the devices and structures are disclosed. Exemplary tensile-stressed silicon arsenic layer have an arsenic doping level of greater than 5 E+20 arsenic atoms per cubic centimeter. The structures can be used to form metal oxide semiconductor devices.
Public/Granted literature
- US20140084341A1 STRUCTURES AND DEVICES INCLUDING A TENSILE-STRESSED SILICON ARSENIC LAYER AND METHODS OF FORMING SAME Public/Granted day:2014-03-27
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