Invention Grant
- Patent Title: Dual write wordline memory cell
- Patent Title (中): 双写字线存储单元
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Application No.: US14320024Application Date: 2014-06-30
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Publication No.: US09336863B2Publication Date: 2016-05-10
- Inventor: Seong-Ook Jung , Younghwi Yang , Stanley Seungchul Song , Choh Fei Yeap , Zhongze Wang
- Applicant: QUALCOMM Incorporated , Industry-Academic Cooperation Foundation, Yonsei University
- Applicant Address: US CA San Diego
- Assignee: QUALCOMM Incorporated
- Current Assignee: QUALCOMM Incorporated
- Current Assignee Address: US CA San Diego
- Agency: Toler Law Group
- Main IPC: G11C11/417
- IPC: G11C11/417 ; G11C5/06 ; G11C7/00 ; G11C8/16 ; G11C5/02 ; G11C11/419 ; G11C11/412 ; G11C8/14 ; G11C7/20

Abstract:
A static random-access memory (SRAM) memory cell includes a pair of cross-coupled inverters and a gating transistor coupled to a first node of a first inverter of the pair of cross-coupled inverters. A gate of the gating transistor is coupled to a first wordline. The gating transistor is configured to selectively couple a bitline to the first node of the first inverter responsive to a first wordline signal. The first inverter has a second node coupled to a second wordline. The first wordline and the second wordline are each independently controllable.
Public/Granted literature
- US20150380080A1 DUAL WRITE WORDLINE MEMORY CELL Public/Granted day:2015-12-31
Information query
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