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US09337259B2 Structure and method to improve ETSOI MOSFETS with back gate 有权
具有后栅的ETSOI MOSFET的结构和方法

Structure and method to improve ETSOI MOSFETS with back gate
Abstract:
A structure to improve ETSOI MOSFET devices includes a wafer having regions with at least a first semiconductor layer overlying an oxide layer overlying a second semiconductor layer. The regions are separated by a STI which extends at least partially into the second semiconductor layer and is partially filled with a dielectric. A gate structure is formed over the first semiconductor layer and during the wet cleans involved, the STI divot erodes until it is at a level below the oxide layer. Another dielectric layer is deposited over the device and a hole is etched to reach source and drain regions. The hole is not fully landed, extending at least partially into the STI, and an insulating material is deposited in the hole.
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