Invention Grant
- Patent Title: Scheme to align LDMOS drain extension to moat
- Patent Title (中): 将LDMOS漏极扩展调整为护城河的方案
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Application No.: US14572923Application Date: 2014-12-17
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Publication No.: US09337330B2Publication Date: 2016-05-10
- Inventor: Seetharaman Sridhar
- Applicant: Texas Instruments Incorporated
- Applicant Address: US TX Dallas
- Assignee: TEXAS INSTRUMENTS INCORPORATED
- Current Assignee: TEXAS INSTRUMENTS INCORPORATED
- Current Assignee Address: US TX Dallas
- Agent Jacqueline J. Garner; Frank D. Climino
- Main IPC: H01L29/78
- IPC: H01L29/78 ; H01L29/66 ; H01L29/167 ; H01L29/08 ; H01L29/10 ; H01L21/027 ; H01L21/762 ; H01L21/266 ; H01L21/265

Abstract:
An integrated circuit and method having an extended drain MOS transistor, wherein a diffused drain is deeper under a field oxide element in the drain than in a drift region under the gate. A field oxide hard mask layer is etched to define a drain field oxide trench area. Drain dopants are implanted through the drain field oxide trench area and a thermal drain drive is performed. Subsequently, the drain field oxide element is formed.
Public/Granted literature
- US20150179792A1 SCHEME TO ALIGN LDMOS DRAIN EXTENSION TO MOAT Public/Granted day:2015-06-25
Information query
IPC分类: