An apparatus has a shared fuse array and a plurality of x86-compatible microprocessors disposed on a die. The shared fuse array has a plurality of semiconductor fuses programmed with compressed configuration data and error checking and correction (ECC) codes accessible by a plurality of x86-compatible microprocessors and another plurality of semiconductor fuses programmed with uncompressed system hardware configuration data that is employed to initialize control circuit elements within the plurality of x86-compatible microprocessors. The plurality of microprocessor cores is disposed on the die, where each of the plurality of microprocessors is coupled to the shared fuse array and is configured to access all of the compressed configuration data during power-up/reset, for initialization of elements within the each of the plurality of microprocessors. The each of the plurality of microprocessors includes a reset controller that is configured to access the compressed configuration data and the ECC codes, to correct errors in said compressed configuration data resulting in corrected compressed configuration data, to decompress the corrected compressed configuration data, and to distribute decompressed configuration data to initialize the elements.