- 专利标题: Well implant through dummy gate oxide in gate-last process
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申请号: US14600847申请日: 2015-01-20
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公开(公告)号: US09362399B2公开(公告)日: 2016-06-07
- 发明人: Sheng Chiang Hung , Huai-Ying Huang , Ping-Wei Wang
- 申请人: Taiwan Semiconductor Manufacturing Company, Ltd.
- 申请人地址: TW Hsin-Chu
- 专利权人: Taiwn Semiconductor Manufacturing Company, Ltd.
- 当前专利权人: Taiwn Semiconductor Manufacturing Company, Ltd.
- 当前专利权人地址: TW Hsin-Chu
- 代理机构: Haynes and Boone, LLP
- 主分类号: H01L27/06
- IPC分类号: H01L27/06 ; H01L29/78 ; H01L29/66 ; H01L29/08 ; H01L29/167 ; H01L29/49 ; H01L21/8238
摘要:
The present disclosure relates to methods for fabricating a field-effect transistor. The method includes performing a pocket implantation to a semiconductor substrate; thereafter forming a polysilicon layer on the semiconductor substrate; and patterning the polysilicon layer to form a polysilicon gate.The field-effect transistor (FET) includes a well of a first type dopant, formed in a semiconductor substrate; a metal gate disposed on the semiconductor substrate and overlying the well; a channel formed in the semiconductor substrate and underlying the metal gate; source and drain regions of a second type dopant opposite from the first type, the source and drain regions being formed in the semiconductor substrate and on opposite sides of the channel; and a pocket doping profile of the first type dopant and being defined in the well to form a continuous and uniform doping region from the source region to the drain region.
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