Invention Grant
US09372226B2 Wafer test structures and methods of providing wafer test structures
有权
晶圆测试结构和提供晶圆测试结构的方法
- Patent Title: Wafer test structures and methods of providing wafer test structures
- Patent Title (中): 晶圆测试结构和提供晶圆测试结构的方法
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Application No.: US14337290Application Date: 2014-07-22
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Publication No.: US09372226B2Publication Date: 2016-06-21
- Inventor: Suresh Uppal , Randy W. Mann , William McMahon
- Applicant: GLOBALFOUNDRIES Inc.
- Applicant Address: KY Grand Cayman
- Assignee: GLOBALFOUNDRIES INC.
- Current Assignee: GLOBALFOUNDRIES INC.
- Current Assignee Address: KY Grand Cayman
- Agency: Heslin Rothenberg Farley and Mesiti PC
- Agent Nicholas Mesiti
- Main IPC: G06F17/00
- IPC: G06F17/00 ; G01R31/28 ; H01L23/525 ; H01L21/66

Abstract:
Wafer test structures and methods of providing wafer test structures are described. The methods include: fabricating multiple test devices and multiple fuse devices on the wafer, each test device having a respective fuse device associated therewith, which open circuits upon failure of the test device; and fabricating a selection circuit operative to selectively connect one test device to a sense contact pad, and the other test devices to a stress contact pad. The selection circuit facilitates sensing one or more electrical signals of the one test device by electrical contact with the sense contact pad, while stress testing the other test devices by electrical contact with the stress contact pad. In one embodiment, each test device has respective first and second switch devices, operative to selectively electrically connect the test device to the sense or stress contact pads. In another embodiment, the method includes wafer testing using the test structure.
Public/Granted literature
- US20160025805A1 WAFER TEST STRUCTURES AND METHODS OF PROVIDING WAFER TEST STRUCTURES Public/Granted day:2016-01-28
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