Invention Grant
- Patent Title: Solder joint flip chip interconnection
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Application No.: US14305185Application Date: 2014-06-16
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Publication No.: US09373573B2Publication Date: 2016-06-21
- Inventor: Rajendra D. Pendse , KyungOe Kim , TaeWoo Kang
- Applicant: STATS ChipPAC, Ltd.
- Applicant Address: SG Singapore
- Assignee: STATS ChipPAC Pte. Ltd.
- Current Assignee: STATS ChipPAC Pte. Ltd.
- Current Assignee Address: SG Singapore
- Agency: Patent Law Group: Atkins and Associates, P.C.
- Agent Robert A. Atkins
- Main IPC: H01L21/44
- IPC: H01L21/44 ; H01L23/48 ; H01L23/52 ; H01L23/498 ; H01L21/56 ; H01L23/00 ; H01L21/768 ; H01L23/522

Abstract:
A flip chip interconnect has a tapering interconnect structure, and the area of contact of the interconnect structure with the site on the substrate metallization is less than the area of contact of the interconnect structure with the die pad. Also, a bond-on-lead or bond-on-narrow pad or bond on a small area of a contact pad interconnection includes such tapering flip chip interconnects. Also, methods for making the interconnect structure include providing a die having interconnect pads, providing a substrate having interconnect sites on a patterned conductive layer, providing a bump on a die pad, providing a fusible electrically conductive material either at the interconnect site or on the bump, mating the bump to the interconnect site, and heating to melt the fusible material.
Public/Granted literature
- US20140291839A1 Solder Joint Flip Chip Interconnection Public/Granted day:2014-10-02
Information query
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