Invention Grant
- Patent Title: Copper etching integration scheme
- Patent Title (中): 铜蚀刻集成方案
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Application No.: US14218060Application Date: 2014-03-18
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Publication No.: US09373586B2Publication Date: 2016-06-21
- Inventor: Chih-Wei Lu , Chung-Ju Lee , Hsiang-Huan Lee , Tien-I Bao
- Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.
- Applicant Address: TW Hsin-Chu
- Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.
- Current Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.
- Current Assignee Address: TW Hsin-Chu
- Agency: Eschweiler & Associates, LLC
- Main IPC: H01L23/48
- IPC: H01L23/48 ; H01L23/538 ; H01L23/528 ; H01L23/532 ; H01L21/768 ; H01L23/522

Abstract:
The present disclosure is directed to an interconnect structure. The metal interconnect structure has a metal body disposed over a semiconductor substrate and a projection extending from the metal body. A barrier layer continuously extends over the projection from a first sidewall of metal body to an opposing second sidewall of the metal body. A layer of dielectric material is disposed over the semiconductor substrate at a position abutting the metal body and the projection.
Public/Granted literature
- US20140197538A1 COPPER ETCHING INTEGRATION SCHEME Public/Granted day:2014-07-17
Information query
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