- 专利标题: Parallel rate control for digital video encoder with multi-processor architecture and picture-based look-ahead window
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申请号: US13253937申请日: 2011-10-05
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公开(公告)号: US09374615B2公开(公告)日: 2016-06-21
- 发明人: Guoyao Yu , Mayer D. Schwartz , Charles H. Van Dusen , Peter Borgwardt
- 申请人: Guoyao Yu , Mayer D. Schwartz , Charles H. Van Dusen , Peter Borgwardt
- 申请人地址: US GA Suwanee
- 专利权人: ARRIS Enterprises, Inc.
- 当前专利权人: ARRIS Enterprises, Inc.
- 当前专利权人地址: US GA Suwanee
- 代理商 Stewart M. Wiener
- 主分类号: H04B1/66
- IPC分类号: H04B1/66 ; H04N21/44 ; H04N21/234 ; H04N19/176 ; H04N19/172 ; H04N19/15 ; H04N19/115 ; H04N19/124 ; H04N19/14 ; H04N19/152 ; H04N19/194 ; H04N19/436
摘要:
A method of operating a multi-processor video encoder by determining a target size corresponding to a preferred number of bits to be used when creating an encoded version of a picture in a group of sequential pictures making up a video sequence. The method includes the steps of calculating a first degree of fullness of a coded picture buffer at a first time, operating on the first degree of fullness to return an estimated second degree of fullness of the coded picture buffer at a second time, and operating on the second degree of fullness to return an initial target sized for the picture. The first time corresponds to the most recent time an accurate degree of fullness of the coded picture buffer can be calculated and the second time occurs after the first time.
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