Invention Grant
- Patent Title: Semiconductor test structures
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Application No.: US14246405Application Date: 2014-04-07
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Publication No.: US09377503B2Publication Date: 2016-06-28
- Inventor: An-Chun Tu , Chen-Ming Huang , Chih-Jen Wu , Chin-Hsiang Lin
- Applicant: An-Chun Tu , Chen-Ming Huang , Chih-Jen Wu , Chin-Hsiang Lin
- Applicant Address: TW Hsin-Chu
- Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
- Current Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
- Current Assignee Address: TW Hsin-Chu
- Agency: Haynes and Boone, LLP
- Main IPC: H01L27/00
- IPC: H01L27/00 ; G01R31/26 ; H01L21/66 ; G01R31/28

Abstract:
A method performed using a resistive device, where the resistive device includes a substrate with an active region separated from a gate electrode by a dielectric and electrical contacts along a longest dimension of the gate electrode, the method comprising, performing one or more processes to form the resistive device, measuring a resistance between the electrical contacts, and correlating the measured resistance with a variation in one or more of the processes.
Public/Granted literature
- US20140206113A1 Semiconductor Test Structures Public/Granted day:2014-07-24
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