Invention Grant
US09378072B2 Mechanisms and apparatus for embedded controller reconfigurable inter-processor communications 有权
嵌入式控制器可重构处理器间通信的机制和装置

Mechanisms and apparatus for embedded controller reconfigurable inter-processor communications
Abstract:
A system and method for reconfigurable inter-processor communications in a controller. The system and method include providing multiple processors in the controller and generating a send buffer and a receive buffer for each of the processors. The system and method further include generating a send table and a receive table for each of the processors where the send table stores identifying information about messages being sent and where the receive table stores identifying information about messages being received, and providing infrastructure services that include protocols for sending and receiving messages between multiple processors in the controller.
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