Mechanisms and apparatus for embedded controller reconfigurable inter-processor communications
    3.
    发明授权
    Mechanisms and apparatus for embedded controller reconfigurable inter-processor communications 有权
    嵌入式控制器可重构处理器间通信的机制和装置

    公开(公告)号:US09378072B2

    公开(公告)日:2016-06-28

    申请号:US14291658

    申请日:2014-05-30

    CPC classification number: G06F9/546 G06F15/17306 G06F15/82

    Abstract: A system and method for reconfigurable inter-processor communications in a controller. The system and method include providing multiple processors in the controller and generating a send buffer and a receive buffer for each of the processors. The system and method further include generating a send table and a receive table for each of the processors where the send table stores identifying information about messages being sent and where the receive table stores identifying information about messages being received, and providing infrastructure services that include protocols for sending and receiving messages between multiple processors in the controller.

    Abstract translation: 一种用于控制器中的可配置处理器间通信的系统和方法。 该系统和方法包括在控制器中提供多个处理器,并为每个处理器生成发送缓冲器和接收缓冲器。 该系统和方法还包括为每个处理器生成发送表和接收表,其中发送表存储关于正在发送的消息的标识信息,以及接收表存储关于正在接收的消息的标识信息,以及提供包括协议的基础设施服务 用于在控制器中的多个处理器之间发送和接收消息。

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