Disclosed are an accumulator for reducing nonlinearity of a data converter and a data weighted average device including the accumulator. According to the accumulator including a register configured to output input data according to a clock signal; a first adder configured to receive a digital input signal having any bit width and an output signal from the register to perform an add operation; a preset unit configured to output a preset value or a 0 value according to whether a carry of the first adder is generated; and a second adder configured to receive an output signal of the first adder and an output signal of the preset unit to perform the add operation and input the add operation to the register and the data weighted average device including the accumulator, it is possible to improve the nonlinearity occurring in the data converter by generating a number of DAC codes in addition to 2n DAC codes.