Invention Grant
US09378838B2 Mixed voltage non-volatile memory integrated circuit with power saving
有权
混合电压非易失性存储器集成电路,省电
- Patent Title: Mixed voltage non-volatile memory integrated circuit with power saving
- Patent Title (中): 混合电压非易失性存储器集成电路,省电
-
Application No.: US14257335Application Date: 2014-04-21
-
Publication No.: US09378838B2Publication Date: 2016-06-28
- Inventor: Hieu Van Tran , Anh Ly , Thuan Vu , Hung Quoc Nguyen
- Applicant: Silicon Storage Technology, Inc.
- Applicant Address: US CA San Jose
- Assignee: Silicon Storage Technology, Inc.
- Current Assignee: Silicon Storage Technology, Inc.
- Current Assignee Address: US CA San Jose
- Agency: DLA Piper LLP (US)
- Main IPC: G11C16/04
- IPC: G11C16/04 ; G11C16/30 ; G11C5/14 ; G11C16/08 ; G11C11/56

Abstract:
An integrated circuit die has a first die pad for receiving a first voltage and a second die pad for receiving a second voltage. The second voltage is less than the first voltage and is generated by a voltage regulator that receives the first voltage. A first circuit which is operable at the first voltage is in the integrated circuit die. A second circuit which is operable at the second voltage is in the integrated circuit die and is connected to the second die pad. The voltage regulator is enabled by a controller.
Public/Granted literature
- US20140226409A1 Mixed Voltage Non-volatile Memory Integrated Circuit With Power Saving Public/Granted day:2014-08-14
Information query