- Patent Title: FinFET semiconductor device having increased gate height control
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Application No.: US14723681Application Date: 2015-05-28
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Publication No.: US09379135B2Publication Date: 2016-06-28
- Inventor: Kangguo Cheng , Ali Khakifirooz , Shom Ponoth , Raghavasimhan Sreenivasan
- Applicant: GLOBALFOUNDRIES INC.
- Applicant Address: KY Grand Cayman
- Assignee: GLOBALFOUNDRIES INC.
- Current Assignee: GLOBALFOUNDRIES INC.
- Current Assignee Address: KY Grand Cayman
- Agency: Hoffman Warnick LLC
- Agent Anthony Canale
- Main IPC: H01L27/12
- IPC: H01L27/12 ; H01L21/762 ; H01L21/84 ; H01L29/66 ; H01L29/06 ; H01L29/423 ; H01L29/78

Abstract:
A semiconductor device includes a silicon-on-insulator (SOI) substrate having a buried oxide (BOX) layer, and a plurality of semiconductor fins formed on the BOX layer. The plurality of semiconductor fins include at least one pair of fins defining a BOX region therebetween. Gate lines are formed on the SOI substrate and extend across the plurality of semiconductor fins. Each gate line initially includes a dummy gate and a hardmask. A high dielectric (high-k) layer is formed on the hardmask and the BOX regions. At least one spacer is formed on each gate line such that the high-k layer is disposed between the spacer and the hardmask. A replacement gate process replaces the hardmask and the dummy gate with a metal gate. The high-k layer is ultimately removed from the gate line, while the high-k layer remains on the BOX region.
Public/Granted literature
- US20150263046A1 FINFET SEMICONDUCTOR DEVICE HAVING INCREASED GATE HEIGHT CONTROL Public/Granted day:2015-09-17
Information query
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