Invention Grant
- Patent Title: Phase locked loop device
- Patent Title (中): 锁相环装置
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Application No.: US14674579Application Date: 2015-03-31
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Publication No.: US09379719B1Publication Date: 2016-06-28
- Inventor: Wen-Hung Huang
- Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
- Applicant Address: TW Hsinchu
- Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
- Current Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
- Current Assignee Address: TW Hsinchu
- Agency: Maschoff Brennan
- Main IPC: H03L7/06
- IPC: H03L7/06 ; H03L7/081 ; H03L7/093

Abstract:
A device is disclosed that includes a control module and a gain estimation module. The control module is configured to superimpose two non-zero values on a frequency control word to respectively generate a first and a second modified fractional reference phase signals, under a condition that a fractional part of the frequency control word is smaller than a predetermined value. The gain estimation module is configured to calculate a first and a second estimated gain values respectively based on the first and the second modified fractional reference phase signals. The control module is further configured to calculate an estimated digital-to-time converter gain value based on an interpolation of the first and the second estimated gain values.
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