Invention Grant
US09379734B2 Method and arrangement for setting an effective resolution of an output signal in incremental delta-sigma analog-to-digital converters
有权
用于在增量式Δ-Σ模数转换器中设置输出信号的有效分辨率的方法和装置
- Patent Title: Method and arrangement for setting an effective resolution of an output signal in incremental delta-sigma analog-to-digital converters
- Patent Title (中): 用于在增量式Δ-Σ模数转换器中设置输出信号的有效分辨率的方法和装置
-
Application No.: US14939679Application Date: 2015-11-12
-
Publication No.: US09379734B2Publication Date: 2016-06-28
- Inventor: Raik Richter , Marko Mailand
- Applicant: ZENTRUM MIKROELEKTRONIK DRESDEN AG
- Applicant Address: DE Dresden
- Assignee: ZENTRUM MIKROELEKTRONIK DRESEN AG
- Current Assignee: ZENTRUM MIKROELEKTRONIK DRESEN AG
- Current Assignee Address: DE Dresden
- Agency: Heslin Rothenberg Farley & Mesiti P.C.
- Priority: DE102014116599 20141113
- Main IPC: H03M3/00
- IPC: H03M3/00

Abstract:
A method and arrangement for setting an effective resolution of an output signal in an incremental delta-sigma analog-to-digital conversion by an incremental delta-sigma analog-to-digital converter, includes feeding a difference between an input signal and a reference voltage signal formed in a feedback branch to a first integrator. Safeguarding the stability of multi-stage incremental delta-sigma analog-to-digital converters for large input signal ranges and not requiring direct damping of the input signal, such that a direct SNR impairment with regard to the ADC-inherent noise sources can be avoided, is achieved by a virtual reference voltage in the feedback branch of the incremental delta-sigma analog-to-digital converter. The reference voltage signal is adapted to a changing input signal range by a settable reference capacitance and a clock cycle number dependent thereon is set.
Public/Granted literature
Information query