Method and arrangement for setting an effective resolution of an output signal in incremental delta-sigma analog-to-digital converters
    1.
    发明授权
    Method and arrangement for setting an effective resolution of an output signal in incremental delta-sigma analog-to-digital converters 有权
    用于在增量式Δ-Σ模数转换器中设置输出信号的有效分辨率的方法和装置

    公开(公告)号:US09379734B2

    公开(公告)日:2016-06-28

    申请号:US14939679

    申请日:2015-11-12

    IPC分类号: H03M3/00

    摘要: A method and arrangement for setting an effective resolution of an output signal in an incremental delta-sigma analog-to-digital conversion by an incremental delta-sigma analog-to-digital converter, includes feeding a difference between an input signal and a reference voltage signal formed in a feedback branch to a first integrator. Safeguarding the stability of multi-stage incremental delta-sigma analog-to-digital converters for large input signal ranges and not requiring direct damping of the input signal, such that a direct SNR impairment with regard to the ADC-inherent noise sources can be avoided, is achieved by a virtual reference voltage in the feedback branch of the incremental delta-sigma analog-to-digital converter. The reference voltage signal is adapted to a changing input signal range by a settable reference capacitance and a clock cycle number dependent thereon is set.

    摘要翻译: 用于通过增量Δ-Σ模数转换器设置增量Δ-Σ模数转换中的输出信号的有效分辨率的方法和装置包括馈送输入信号和参考电压之间的差 在第一积分器的反馈分支中形成的信号。 保护多级增量Δ-Σ模数转换器对于大输入信号范围的稳定性,不需要输入信号的直接阻尼,从而可以避免相对于ADC固有噪声源的直接SNR损害 ,通过增量Δ-Σ模数转换器的反馈支路中的虚拟参考电压来实现。 参考电压信号适应于可变参考电容的改变的输入信号范围,并且依赖于其的时钟周期数被设置。