Invention Grant
US09384092B2 Semiconductor memory device with multiple sub-memory cell arrays and memory system including same
有权
具有多个子存储单元阵列的半导体存储器件和包括其的存储器系统
- Patent Title: Semiconductor memory device with multiple sub-memory cell arrays and memory system including same
- Patent Title (中): 具有多个子存储单元阵列的半导体存储器件和包括其的存储器系统
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Application No.: US14300289Application Date: 2014-06-10
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Publication No.: US09384092B2Publication Date: 2016-07-05
- Inventor: Dae Hyun Kim , Seung Jun Bae , Young Soo Sohn , Tae Young Oh , Won Jin Lee
- Applicant: SAMSUNG ELECTRONICS CO., LTD.
- Applicant Address: KR Suwon-si, Gyeonggi-do
- Assignee: Samsung Electronics Co., Ltd.
- Current Assignee: Samsung Electronics Co., Ltd.
- Current Assignee Address: KR Suwon-si, Gyeonggi-do
- Agency: Volentine & Whitt, PLLC
- Priority: KR10-2013-0074016 20130626
- Main IPC: G11C29/42
- IPC: G11C29/42 ; G06F11/10 ; G11C7/08 ; G11C7/06 ; G11C29/54 ; G11C11/4091 ; G11C11/419
Abstract:
A semiconductor memory device includes; a memory cell array comprising a first sub-memory cell array storing first data having a first characteristic and a second sub-memory cell array storing second data having a second characteristic different from the first characteristic, a first peripheral circuit operatively associated with only the first sub-memory cell array to execute at least one of a read operation and a write operation directed to a target memory cell of the first sub-memory cell array, and a second peripheral circuit operatively associated with only the second sub-memory cell array to execute at least one of a read operation and a write operation directed to a target memory cell of the second sub-memory cell array.
Public/Granted literature
- US20150006994A1 SEMICONDUCTOR MEMORY DEVICE WITH MULTIPLE SUB-MEMORY CELL ARRAYS AND MEMORY SYSTEM INCLUDING SAME Public/Granted day:2015-01-01
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