Invention Grant
- Patent Title: Data loading circuit and semiconductor memory device comprising same
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Application No.: US14623133Application Date: 2015-02-16
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Publication No.: US09384861B2Publication Date: 2016-07-05
- Inventor: Jong-Min Oh , Ho-Young Song , Seong-Jin Jang
- Applicant: SAMSUNG ELECTRONICS CO., LTD.
- Applicant Address: KR Suwon-si, Gyeonggi-do
- Assignee: Samsung Electronics Co., Ltd.
- Current Assignee: Samsung Electronics Co., Ltd.
- Current Assignee Address: KR Suwon-si, Gyeonggi-do
- Agency: Volentine & Whitt, PLLC
- Priority: KR10-2012-0115140 20121017
- Main IPC: G11C19/00
- IPC: G11C19/00 ; G11C11/4093 ; G11C7/10 ; G11C29/00 ; G11C8/04 ; G11C16/20 ; G11C17/16 ; G11C29/04

Abstract:
A data loading circuit comprises a non-volatile memory configured to store non-volatile data and output a serial data signal based on the stored non-volatile data in response to a power-up operation, a deserializer configured to receive the serial data signal and output multiple data bits at intervals of a unit period based on the received serial data signal, a load controller configured to generate multiple loading selection signals that are sequentially activated one-by-one at each interval of the unit period, and a loading memory unit configured to sequentially store the data bits at each interval of the unit period in response to the loading selection signals.
Public/Granted literature
- US20150162103A1 DATA LOADING CIRCUIT AND SEMICONDUCTOR MEMORY DEVICE COMPRISING SAME Public/Granted day:2015-06-11
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