Invention Grant
- Patent Title: Voltage optimization circuit and managing voltage margins of an integrated circuit
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Application No.: US14876332Application Date: 2015-10-06
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Publication No.: US09389622B2Publication Date: 2016-07-12
- Inventor: Brian L. Smith , Stephen Felix , Jesse Max Guss , Tezaswi Raja
- Applicant: Nvidia Corporation
- Applicant Address: US CA Santa Clara
- Assignee: Nvidia Corporation
- Current Assignee: Nvidia Corporation
- Current Assignee Address: US CA Santa Clara
- Main IPC: G05F1/10
- IPC: G05F1/10 ; G05F3/02 ; G05F1/46

Abstract:
A voltage margin controller, an IC included the same and a method of controlling voltage margin for a voltage domain of an IC are disclosed herein. In one embodiment, the voltage margin controller includes: (1) monitoring branches including circuit function indicators configured to indicate whether circuitry in the voltage domain could operate at corresponding candidate reduced voltage levels and (2) a voltage margin adjuster coupled to the monitoring branches and configured to develop a voltage margin adjustment for a voltage regulator of the voltage domain based upon an operating number of the circuit function indicators.
Public/Granted literature
- US20160026195A1 VOLTAGE OPTIMIZATION CIRCUIT AND MANAGING VOLTAGE MARGINS OF AN INTEGRATED CIRCUIT Public/Granted day:2016-01-28
Information query
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