公开(公告)号：US20230140460A1

公开(公告)日：2023-05-04

申请号：US17827918

申请日：2022-05-30

申请人： NVIDIA Corporation

发明人： Carl Jacob Munkberg ,  Jon Niklas Theodor Hasselgren ,  Tianchang Shen ,  Jun Gao ,  Wenzheng Chen ,  Alex John Bauld Evans ,  Thomas Müller-Höhne ,  Sanja Fidler

IPC分类号： G06T17/20 ,  G06T15/50 ,  G06T9/00 ,  G06T15/04 ,  G06N3/08

摘要： A technique is described for extracting or constructing a three-dimensional (3D) model from multiple two-dimensional (2D) images. In an embodiment, a foreground segmentation mask or depth field may be provided as an additional supervision input with each 2D image. In an embodiment, the foreground segmentation mask or depth field is automatically generated for each 2D image. The constructed 3D model comprises a triangular mesh topology, materials, and environment lighting. The constructed 3D model is represented in a format that can be directly edited and/or rendered by conventional application programs, such as digital content creation (DCC) tools. For example, the constructed 3D model may be represented as a triangular surface mesh (with arbitrary topology), a set of 2D textures representing spatially-varying material parameters, and an environment map. Furthermore, the constructed 3D model may be included in 3D scenes and interacts realistically with other objects.

公开(公告)号：US20230137205A1

公开(公告)日：2023-05-04

申请号：US17514735

申请日：2021-10-29

申请人： Nvidia Corporation

发明人： Yaosheng Fu ,  Shie Mannor ,  Evgeny Bolotin ,  David Nellans ,  Gal Dalal

IPC分类号： G06F12/123 ,  G06N20/00 ,  G06T1/60

摘要： Introduced herein is a technique that uses ML to autonomously find a cache management policy that achieves an optimal execution of a given workload of an application. Leveraging ML such as reinforcement learning, the technique trains an agent in an ML environment over multiple episodes of a stabilization process. For each time step in these training episodes, the agent executes the application while making an incremental change to the current policy, i.e., cache-residency statuses of memory address space associated with the workload, until the application can be executed at a stable level. The stable level of execution, for example, can be indicated by performance variations, such as standard deviations, between a certain number of neighboring measurement periods remaining within a certain threshold. The agent, who has been trained in the training episodes, infers the final cache management policy during the final, inferring episode.

公开(公告)号：US20230136860A1

公开(公告)日：2023-05-04

申请号：US17452751

申请日：2021-10-28

申请人： NVIDIA Corporation

发明人： Kang Wang ,  Yue Wu ,  Minwoo Park ,  Gang Pan

IPC分类号： G06T17/05 ,  G06K9/62 ,  G06K9/00 ,  B60W60/00 ,  B60W40/06 ,  B60W30/14 ,  B60W30/09 ,  B60W50/06

摘要： In various examples, to support training a deep neural network (DNN) to predict a dense representation of a 3D surface structure of interest, a training dataset is generated using a parametric mathematical modeling. A variety of synthetic 3D road surfaces may be generated by modeling a 3D road surface using varied parameters to simulate changes in road direction and lateral surface slope. In an example embodiment, a synthetic 3D road surface may be created by modeling a longitudinal 3D curve and expanding the longitudinal 3D curve to a 3D surface, and the resulting synthetic 3D surface may be sampled to form a synthetic ground truth projection image (e.g., a 2D height map). To generate corresponding input training data, a known pattern that represents which pixels may remain unobserved during 3D structure estimation may be generated and applied to a ground truth projection image to simulate a corresponding sparse projection image.

公开(公告)号：US20230136235A1

公开(公告)日：2023-05-04

申请号：US17452744

申请日：2021-10-28

申请人： NVIDIA Corporation

发明人： Kang Wang ,  Yue Wu ,  Minwoo Park ,  Gang Pan

IPC分类号： B60W60/00 ,  B60W40/06 ,  G06K9/00 ,  B60W40/105

摘要： In various examples, a 3D surface structure such as the 3D surface structure of a road (3D road surface) may be observed and estimated to generate a 3D point cloud or other representation of the 3D surface structure. Since the representation may be sparse, one or more densification techniques may be applied to densify the representation of the 3D surface structure. For example, the relationship between sparse and dense projection images (e.g., 2D height maps) may be modeled with a Markov random field, and Maximum a Posterior (MAP) inference may be performed using a corresponding joint probability distribution to estimate the most likely dense values given the sparse values. The resulting dense representation of the 3D surface structure may be provided to an autonomous vehicle drive stack to enable safe and comfortable planning and control of the autonomous vehicle.

公开(公告)号：US20230130642A1

公开(公告)日：2023-04-27

申请号：US17505374

申请日：2021-10-19

申请人： NVIDIA Corporation

发明人： Shaurakar Das ,  Haoxing Ren ,  Santosh Santosh ,  SeshasaiJyothi Kolli ,  Muhammad Arif Mirza ,  Sreedhar Pratty

IPC分类号： G06F30/392 ,  G06F30/398

摘要： To ensure proper operation (e.g., speed and/or function) of standard cells fabricated within an integrated circuit a minimum potential difference between the high and low power supply rails needs to be maintained. IR drop refers to a reduction in the potential difference between the power supply rails and is caused when the switching activity of cells that share a power supply rail is greater than can be provided at a particular time. Before fabrication, placement of the cells is reorganized within bounding box regions. Power density across the power rails within each bounding box is normalized based on spatial and temporal power density characteristics of each cell. The reorganization is IR aware and has minimal impact on timing and IR drop is mitigated because distributing current consumption between the supply rails reduces current spikes and IR drops.

公开(公告)号：US20230126350A1

公开(公告)日：2023-04-27

申请号：US17509948

申请日：2021-10-25

申请人： Nvidia Corporation

发明人： Aaron Richard Carkin ,  William Ryan Weese ,  Ryan Albright ,  Benjamin Goska ,  William Andrew Mecham ,  Michael Thompson

IPC分类号： G06F9/4401 ,  G06F13/16 ,  G06F13/40

摘要： Configurations for communication interfaces are disclosed. In at least one embodiment, a volatile memory bridge provides an interface between a server component and a control entity to receive and transmit a firmware configuration to the server component at startup.

公开(公告)号：US20230125892A1

公开(公告)日：2023-04-27

申请号：US17509966

申请日：2021-10-25

申请人： Nvidia Corporation

发明人： Ryan Albright ,  William Ryan Weese ,  Aaron Richard Carkin ,  William Andrew Mecham ,  Benjamin Goska ,  Michael Thompson

IPC分类号： G06F9/445 ,  G06F9/4401 ,  G06F8/61 ,  G06F11/14

摘要： Configurations for communication interfaces are disclosed. In at least one embodiment, a processor includes one or more circuits to determine a firmware configuration for one or more server components and to transmit the firmware configuration at startup.

公开(公告)号：US11636689B2

公开(公告)日：2023-04-25

申请号：US17014075

申请日：2020-09-08

申请人： NVIDIA Corporation

发明人： Vikas Ashok Jain ,  Samir Sukhdeo Shelke

IPC分类号： G06V20/58 ,  G06T7/20 ,  G06V10/94 ,  G06V20/56

摘要： In various examples, lane location criteria and object class criteria may be used to determine a set of objects in an environment to track. For example, lane information, freespace information, and/or object detection information may be used to filter out or discard non-essential objects (e.g., objects that are not in an ego-lane or adjacent lanes) from objects detected using an object detection algorithm. Further, objects corresponding to non-essential object classes may be filtered out to generate a final filtered set of objects to be tracked that may be of a lower quantity than the actual number of detected objects. As a result, object tracking may only be executed on the final filtered set of objects, thereby decreasing compute requirements and runtime of the system without sacrificing object tracking accuracy and reliability with respect to more pertinent objects.

公开(公告)号：US11636609B2

公开(公告)日：2023-04-25

申请号：US17010205

申请日：2020-09-02

申请人： NVIDIA Corporation

发明人： Nishant Puri

IPC分类号： G06K9/46 ,  G06T7/20 ,  G06T7/00 ,  G06T7/70 ,  G06N20/00 ,  G06N3/08 ,  B60W30/08 ,  G06V20/56 ,  G06V40/16 ,  G06V40/18

摘要： Machine learning systems and methods that determine gaze direction by using face orientation information, such as facial landmarks, to modify eye direction information determined from images of the subject's eyes. System inputs include eye crops of the eyes of the subject, as well as face orientation information such as facial landmarks of the subject's face in the input image. Facial orientation information, or facial landmark information, is used to determine a coarse prediction of gaze direction as well as to learn a context vector of features describing subject face pose. The context vector is then used to adaptively re-weight the eye direction features determined from the eye crops. The re-weighted features are then combined with the coarse gaze prediction to determine gaze direction.

公开(公告)号：US20230124604A1

公开(公告)日：2023-04-20

申请号：US18069722

申请日：2022-12-21

申请人： NVIDIA Corporation

发明人： Ching-Yu Hung ,  Ravi P Singh ,  Jagadeesh Sankaran ,  Yen-Te Shih ,  Ahmad Itani

IPC分类号： G06F3/06 ,  G06F12/0802

摘要： In various examples, a VPU and associated components may be optimized to improve VPU performance and throughput. For example, the VPU may include a min/max collector, automatic store predication functionality, a SIMD data path organization that allows for inter-lane sharing, a transposed load/store with stride parameter functionality, a load with permute and zero insertion functionality, hardware, logic, and memory layout functionality to allow for two point and two by two point lookups, and per memory bank load caching capabilities. In addition, decoupled accelerators may be used to offload VPU processing tasks to increase throughput and performance, and a hardware sequencer may be included in a DMA system to reduce programming complexity of the VPU and the DMA system. The DMA and VPU may execute a VPU configuration mode that allows the VPU and DMA to operate without a processing controller for performing dynamic region based data movement operations.