Invention Grant
US09390771B2 Circuit and method for sensing a difference in voltage on a pair of dual signal lines, in particular through equalize transistor
有权
用于感测一对双信号线上的电压差的电路和方法,特别是通过均衡晶体管
- Patent Title: Circuit and method for sensing a difference in voltage on a pair of dual signal lines, in particular through equalize transistor
- Patent Title (中): 用于感测一对双信号线上的电压差的电路和方法,特别是通过均衡晶体管
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Application No.: US14372345Application Date: 2013-01-16
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Publication No.: US09390771B2Publication Date: 2016-07-12
- Inventor: Richard Ferrant , Roland Thewes
- Applicant: SOITEC
- Applicant Address: FR
- Assignee: Soitec
- Current Assignee: Soitec
- Current Assignee Address: FR
- Agency: Lerner, David, Littenberg, Krumholz & Mentlik, LLP
- Priority: FR1250398 20120116
- International Application: PCT/EP2013/050760 WO 20130116
- International Announcement: WO2013/107779 WO 20130725
- Main IPC: G11C7/00
- IPC: G11C7/00 ; G11C7/08 ; G11C7/06 ; G11C7/12 ; G11C11/4091 ; G11C11/4094

Abstract:
A circuit for sensing a difference in voltage on a pair of dual signal lines comprising a first signal line and a second signal line complementary to the first signal line, comprising: a pair of cross-coupled inverters arranged between the first and the second signal lines, each inverter having a pull-up transistor and a pull-down transistor, the sources of the pull-up transistors or of the pull-down transistors being respectively connected to a first and a second pull voltage signals, a decode transistor having source and drain terminals respectively coupled to one of the first and second signal lines and a gate controlled by a decoding control signal, whereby when the decode transistor is turned on by the decoding control signal, a short circuit is established between the first and the second signal lines through which current flows from one of the first and second pull voltage signals, thereby generating a disturb in between the first and the second pull voltage signals.
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