Invention Grant
- Patent Title: Semiconductor integrated circuit device
- Patent Title (中): 半导体集成电路器件
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Application No.: US14506621Application Date: 2014-10-04
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Publication No.: US09391606B2Publication Date: 2016-07-12
- Inventor: Noritaka Fukuo , Hideki Aono , Eiichi Murakami
- Applicant: Renesas Electronics Corporation
- Applicant Address: JP Kawasaki-shi, Kanagawa
- Assignee: RENESAS ELECTRONICS CORPORATION
- Current Assignee: RENESAS ELECTRONICS CORPORATION
- Current Assignee Address: JP Kawasaki-shi, Kanagawa
- Agency: McGinn IP Law Group PLLC
- Priority: JP2013-217504 20131018
- Main IPC: H03L7/00
- IPC: H03L7/00 ; H03K17/284 ; H03K17/30

Abstract:
An NBTI malfunction of a P-channel MOS transistor is prevented. A semiconductor integrated circuit device includes a reset pulse control unit RPC. The reset pulse control unit RPC generates a reset pulse RP for recovery from degradation caused by NBTI of a MOS transistor that receives a negative voltage at the gate of the transistor in a standby status. After the generated reset pulse RP is inputted to the gate of the MOS transistor, an action control signal ACC for activating the MOS transistor is inputted to the gate of the MOS transistor to activate the transistor.
Public/Granted literature
- US20150109046A1 Semiconductor Integrated Circuit Device Public/Granted day:2015-04-23
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