A vertical gate nonvolatile NAND array includes a plurality of vertically stacked NAND strings of nonvolatile memory cells, a plurality of word lines arranged orthogonally over the plurality of vertically stacked NAND strings, and a plurality of vertical columns of conductive gate material electrically coupled to the plurality of word lines. The plurality of vertically stacked NAND strings are with vertically stacked semiconductor strips having opposite sides including a first side and a second side. The vertical columns in the plurality of vertical columns are gates to only one side of the first side and the second side of the opposite sides of the vertically stacked semiconductor strips. The vertical columns in the plurality of vertical columns are gates to adjacent stacks in the plurality of vertically stacked NAND strings.