Invention Grant
- Patent Title: Semiconductor arrangement and formation thereof
- Patent Title (中): 半导体装置及其形成
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Application No.: US14133699Application Date: 2013-12-19
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Publication No.: US09413140B2Publication Date: 2016-08-09
- Inventor: Hung-Chang Yu , Ying-Hao Kuo , Kai-Chun Lin , Yue-Der Chih
- Applicant: Taiwan Semiconductor Manufacturing Company Limited
- Applicant Address: TW Hsin-Chu
- Assignee: Taiwan Semiconductor Manufacturing Company Limited
- Current Assignee: Taiwan Semiconductor Manufacturing Company Limited
- Current Assignee Address: TW Hsin-Chu
- Agency: Cooper Legal Group, LLC
- Main IPC: H04B10/00
- IPC: H04B10/00 ; H01S5/30 ; H04B10/43 ; H01S5/02 ; H01S5/026 ; H01S5/028 ; H01S5/183

Abstract:
A semiconductor arrangement and a method of forming the same are described. A semiconductor arrangement includes a first layer including a first optical transceiver and a second layer including a second optical transceiver. A first serializer/deserializer (SerDes) is connected to the first optical transceiver and a second SerDes is connected to the second optical transceiver. The SerDes converts parallel data input into serial data output including a clock signal that the first transceiver transmits to the second transceiver. The semiconductor arrangement has a lower area penalty than traditional intra-layer communication arrangements that do not use optics for alignment, and mitigates alignment issues associated with conventional techniques.
Public/Granted literature
- US20150180210A1 SEMICONDUCTOR ARRANGEMENT AND FORMATION THEREOF Public/Granted day:2015-06-25
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