Invention Grant
- Patent Title: Integrated circuit with on-die decoupling capacitors
- Patent Title (中): 带片上去耦电容的集成电路
-
Application No.: US14467039Application Date: 2014-08-24
-
Publication No.: US09418873B2Publication Date: 2016-08-16
- Inventor: Shailesh Kumar , Vikas Garg , Sumit Varshney , Chetan Verma
- Applicant: Shailesh Kumar , Vikas Garg , Sumit Varshney , Chetan Verma
- Applicant Address: US TX Austin
- Assignee: FREESCALE SEMICONDUCTOR, INC.
- Current Assignee: FREESCALE SEMICONDUCTOR, INC.
- Current Assignee Address: US TX Austin
- Agent Charles E. Bergere
- Main IPC: H01L23/48
- IPC: H01L23/48 ; H01L23/12 ; H01G2/14 ; H01L21/50 ; H01L23/522 ; H01L23/495
Abstract:
A semiconductor device has an on-die decoupling capacitor that is shared between alternative high-speed interfaces. A capacitance pad is connected to the decoupling capacitor and internal connection pads are connected respectively to the alternative interfaces. Internal connection bond wires connect the decoupling capacitor to the selected interface through the capacitance pad and the internal connection pads in the same process as connecting the die to external electrical contacts of the device.
Public/Granted literature
- US20160056099A1 INTEGRATED CIRCUIT WITH ON-DIE DECOUPLING CAPACITORS Public/Granted day:2016-02-25
Information query
IPC分类:
