Invention Grant
US09443730B2 Process for forming silicon-filled openings with a reduced occurrence of voids
有权
用于形成具有减少的空隙发生的填充硅的开口的方法
- Patent Title: Process for forming silicon-filled openings with a reduced occurrence of voids
- Patent Title (中): 用于形成具有减少的空隙发生的填充硅的开口的方法
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Application No.: US14335446Application Date: 2014-07-18
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Publication No.: US09443730B2Publication Date: 2016-09-13
- Inventor: Steven R. A. Van Aerde , Cornelius A. van der Jeugd , Theodorus G. M. Oosterlaken
- Applicant: ASM IP Holding B.V.
- Applicant Address: NL
- Assignee: ASM IP Holding B.V.
- Current Assignee: ASM IP Holding B.V.
- Current Assignee Address: NL
- Agency: Knobbe, Martens, Olson & Bear LLP
- Main IPC: H01L21/20
- IPC: H01L21/20 ; H01L21/02

Abstract:
In some embodiments, silicon-filled openings are formed having no or a low occurrence of voids in the silicon fill, while maintaining a smooth exposed silicon surface. In some embodiments, an opening in a substrate may be filled with silicon, such as amorphous silicon. The deposited silicon may have interior voids. This deposited silicon is then exposed to a silicon mobility inhibitor, such as an oxygen-containing species and/or a semiconductor dopant. The deposited silicon fill is subsequently annealed. After the anneal, the voids may be reduced in size and, in some embodiments, this reduction in size may occur to such an extent that the voids are eliminated.
Public/Granted literature
- US20160020093A1 PROCESS FOR FORMING SILICON-FILLED OPENINGS WITH A REDUCED OCCURRENCE OF VOIDS Public/Granted day:2016-01-21
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