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13 条记录 (耗时 0.039 秒)

    Process for forming silicon-filled openings with a reduced occurrence of voids
    2.
    发明授权
    Process for forming silicon-filled openings with a reduced occurrence of voids 有权
    用于形成具有减少的空隙发生的填充硅的开口的方法

    公开(公告)号：US09443730B2

    公开(公告)日：2016-09-13

    申请号：US14335446

    申请日：2014-07-18

    申请人： ASM IP Holding B.V.

    发明人： Steven R. A. Van Aerde ,  Cornelius A. van der Jeugd ,  Theodorus G. M. Oosterlaken

    IPC分类号： H01L21/20 ,  H01L21/02

    CPC分类号： H01L21/02667 ,  H01L21/02532 ,  H01L21/02592 ,  H01L21/0262 ,  H01L21/02669

    摘要： In some embodiments, silicon-filled openings are formed having no or a low occurrence of voids in the silicon fill, while maintaining a smooth exposed silicon surface. In some embodiments, an opening in a substrate may be filled with silicon, such as amorphous silicon. The deposited silicon may have interior voids. This deposited silicon is then exposed to a silicon mobility inhibitor, such as an oxygen-containing species and/or a semiconductor dopant. The deposited silicon fill is subsequently annealed. After the anneal, the voids may be reduced in size and, in some embodiments, this reduction in size may occur to such an extent that the voids are eliminated.

    摘要翻译： 在一些实施例中，形成硅填充开口，其在硅填充物中没有或少量出现空隙，同时保持光滑的暴露的硅表面。 在一些实施例中，衬底中的开口可以填充有硅，例如非晶硅。 沉积的硅可能具有内部空隙。 然后将沉积的硅暴露于硅迁移率抑制剂，例如含氧物质和/或半导体掺杂剂。 沉积的硅填充物随后退火。 在退火之后，空隙的尺寸可以减小，并且在一些实施例中，尺寸的这种减小可以发生到消除空隙的程度。

    Wafer boat handling device, vertical batch furnace and method
    3.
    发明授权
    Wafer boat handling device, vertical batch furnace and method 有权

    公开(公告)号：US11515188B2

    公开(公告)日：2022-11-29

    申请号：US15930567

    申请日：2020-05-13

    申请人： ASM IP Holding B.V.

    发明人： Christianus G. M. de Ridder ,  Theodorus G. M. Oosterlaken

    IPC分类号： B65G61/00 ,  F27D3/00 ,  F27D3/12 ,  H01L21/677 ,  H01L21/324 ,  H01L21/67 ,  H01L21/673

    摘要： Wafer boat handling device, configured to be positioned under a process chamber of a vertical batch furnace, and comprising a rotatable table comprising a first and a second wafer boat support surface. Each wafer boat support surface is configured for supporting a wafer boat. The rotatable table is rotatable by an actuator to rotate both the first and the second wafer support surfaces to a load/receive position in which the wafer boat handling device is configured to load a wafer boat vertically from the rotatable table into the process chamber and to receive the wafer boat from the process chamber onto the rotatable table, a cooldown position in which the wafer boat handling device is configured to cool down a wafer boat, and a transfer position for transferring wafers to and/or from the wafer boat.

    Fast FOUP swapping with a FOUP handler
    4.
    发明授权
    Fast FOUP swapping with a FOUP handler 有权

    公开(公告)号：US11515187B2

    公开(公告)日：2022-11-29

    申请号：US17242519

    申请日：2021-04-28

    申请人： ASM IP Holding B.V.

    发明人： Theodorus G. M. Oosterlaken ,  Jeroen Fluit

    IPC分类号： H01L21/677

    摘要： A vertical batch furnace assembly for processing wafers having a cassette handling space, a wafer handling space, and a first wall and separating the cassette handling space from the wafer handling space. The first wall has at least one wafer transfer opening in front of which, at a side of the first wall which is directed to the cassette handling space, a wafer transfer position for a wafer cassette is provided. The cassette handling space comprises a cassette storage having a plurality of cassette storage positions and a cassette handler configured to transfer wafer cassettes between the cassette storage positions and the wafer transfer position. The cassette handler has a first cassette handler arm and a second cassette handler arm.

    Assembly of liner and flange for vertical furnace as well as a vertical process furnace
    5.
    发明授权
    Assembly of liner and flange for vertical furnace as well as a vertical process furnace 有权

    公开(公告)号：US10224222B2

    公开(公告)日：2019-03-05

    申请号：US14481131

    申请日：2014-09-09

    申请人： ASM IP Holding B.V.

    发明人： Chris G. M. de Ridder ,  Theodorus G. M. Oosterlaken ,  Klaas P. Boonstra

    IPC分类号： H01L21/67 ,  H01L21/683 ,  H01L21/673

    摘要： An assembly of a liner and a support flange for a vertical furnace for processing wafers, wherein the support flange is configured for supporting the liner, at least two support members that are connected to the cylindrical wall, each having a downwardly directed supporting surface, wherein each downwardly directed supporting surface is positioned radially outwardly from the inner cylindrical surface, wherein the support flange and/or the liner are configured such that, when the liner is placed on the support flange, the downwardly directed supporting surfaces are in contact with an upper surface of the support flange and support the liner, and wherein at least the part of the lower end surface of the liner that bounds the inner cylindrical surface is spaced apart from the upper surface of the support flange.

    MODULAR VERTICAL FURNACE PROCESSING SYSTEM
    6.
    发明申请
    MODULAR VERTICAL FURNACE PROCESSING SYSTEM 有权
    模块式垂直炉加工系统

    公开(公告)号：US20150303079A1

    公开(公告)日：2015-10-22

    申请号：US14648380

    申请日：2013-12-03

    申请人： ASM IP HOLDING B.V.

    发明人： Theodorus G. M. Oosterlaken ,  Chris G. M. de Ridder ,  Bert Jongbloed

    IPC分类号： H01L21/67 ,  B23P6/00 ,  H01L21/673 ,  F27B1/20 ,  H01L21/687

    CPC分类号： H01L21/67098 ,  B23P6/00 ,  F27B1/20 ,  H01L21/6719 ,  H01L21/67303 ,  H01L21/6735 ,  H01L21/67724 ,  H01L21/67775 ,  H01L21/68707

    摘要： A vertical furnace processing system for processing semiconductor substrates, comprising the following modules:—a processing module including a vertical furnace; an I/O-station module including at least one load port to which a substrate cassette is dockable; a wafer handling module configured to transfer semiconductor substrates between the processing module and a substrate cassette docked to the load port of the I/O-station module; and a gas supply module including at least one gas supply or gas supply connection for providing the vertical furnace of the processing module with process gas, wherein at least two of the said modules are mutually decouplably coupled, such that said at least two modules are decouplable from one another to facilitate servicing of the system, and in particular the vertical furnace thereof.

    摘要翻译： 一种用于处理半导体衬底的立式炉处理系统，包括以下模块： - 包括立式炉的处理模块; I / O站模块，其包括至少一个负载端口，衬底盒可停靠在该负载端口上; 晶片处理模块，被配置为在所述处理模块和与所述I / O站模块的负载端口对接的基板盒之间传送半导体衬底; 以及气体供应模块，其包括至少一个气体供应或气体供应连接，用于向处理模块的立式炉提供处理气体，其中至少两个所述模块相互去耦合，使得所述至少两个模块可去耦 从而方便维修系统，特别是其立式炉。

    Semiconductor processing assembly and facility
    9.
    发明授权
    Semiconductor processing assembly and facility 有权

    公开(公告)号：US10319621B2

    公开(公告)日：2019-06-11

    申请号：US14758690

    申请日：2013-12-31

    申请人： ASM IP HOLDING B.V.

    发明人： Theodorus G. M. Oosterlaken

    IPC分类号： H01L21/677

    摘要： A semiconductor processing assembly, comprising at least one semiconductor processing system and a substrate cassette stocker with stocker positions that are at least partially disposed within a footprint of the at least one semiconductor processing system. The semiconductor processing system also includes a local substrate cassette transport system for exchanging substrate cassettes with a global cassette transport system of a processing facility. The local substrate cassette transport system transports cassettes between its substrate cassette exchange station and the stocker positions. Also disclosed is a semiconductor processing facility, having a clean room bay area and a clean room chase area, disposed adjacent to the clean room bay area and separated therefrom by a clean room bounding wall. The facility also includes a semiconductor processing assembly having at least two semiconductor processing systems and a local substrate cassette transport system for transporting substrate cassettes between the semiconductor processing systems.