Invention Grant
US09455206B2 Overlay measuring method and system, and method of manufacturing semiconductor device using the same
有权
覆盖测量方法和系统,以及使用其制造半导体器件的方法
- Patent Title: Overlay measuring method and system, and method of manufacturing semiconductor device using the same
- Patent Title (中): 覆盖测量方法和系统,以及使用其制造半导体器件的方法
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Application No.: US14796478Application Date: 2015-07-10
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Publication No.: US09455206B2Publication Date: 2016-09-27
- Inventor: Seong-Jin Yun , Woo-Seok Ko , Yu-Sin Yang , Sang-Kil Lee , Chung-Sam Jun
- Applicant: Seong-Jin Yun , Woo-Seok Ko , Yu-Sin Yang , Sang-Kil Lee , Chung-Sam Jun
- Applicant Address: KR Suwon-si, Gyeonggi-do
- Assignee: SAMSUNG ELECTRONICS CO., LTD.
- Current Assignee: SAMSUNG ELECTRONICS CO., LTD.
- Current Assignee Address: KR Suwon-si, Gyeonggi-do
- Agency: Lee & Morse, P.C.
- Priority: KR10-2014-0087505 20140711
- Main IPC: H01L21/66
- IPC: H01L21/66 ; H01J37/22

Abstract:
An overlay measuring method includes irradiating an electron beam onto a sample, including a multi-layered structure of overlapped upper and lower patterns formed thereon, to obtain an actual image of the upper and lower patterns. A first image representing the upper pattern and a second image representing the lower pattern are obtained from the actual image. A reference position for the upper and lower patterns is determined from a design image of the upper and lower patterns. A position deviation of the upper pattern with respect to the reference position in the first image and a position deviation of the lower pattern with respect to the reference position in the second image are calculated to determine an overlay between the upper pattern and the lower pattern.
Public/Granted literature
- US20160013109A1 OVERLAY MEASURING METHOD AND SYSTEM, AND METHOD OF MANUFACTURING SEMICONDUCTOR DEVICE USING THE SAME Public/Granted day:2016-01-14
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