Invention Grant
US09465614B2 Parallel execution of instructions in processing units and adjusting power mode based on monitored data dependency over a period of time
有权
在处理单元中并行执行指令，并根据一段时间内监视的数据依赖性调整功耗模式
- Patent Title: Parallel execution of instructions in processing units and adjusting power mode based on monitored data dependency over a period of time
- Patent Title (中): 在处理单元中并行执行指令，并根据一段时间内监视的数据依赖性调整功耗模式
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Application No.: US14195657Application Date: 2014-03-03
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Publication No.: US09465614B2Publication Date: 2016-10-11
- Inventor: Hamed Fatemi , Jose Pineda de Gyvez , Juan Echeverri Escobar
- Applicant: NXP B.V.
- Applicant Address: NL Eindhoven
- Assignee: NXP B.V.
- Current Assignee: NXP B.V.
- Current Assignee Address: NL Eindhoven
- Priority: EP13158209 20130307
- Main IPC: G06F9/30
- IPC: G06F9/30 ; G06F1/32 ; G06F9/38
Abstract:
An integrated circuit comprising a set of data processing units including a first data processing unit and at least one second data processing unit operable at variable frequencies is disclosed. The integrated circuit further includes an instruction scheduler adapted to evaluate data dependencies between individual instructions in a received plurality of instructions and assign the instructions to the first data processing unit and the at least one second data processing unit for parallel execution in accordance with said data dependencies. The integrated circuit is operable in a first power mode and a second power mode. The second power mode is a reduced power mode compared to the first power mode and is adapted to adjust the operating frequency of the first data processing unit and the at least one second data processing unit in the second power mode as a function of the evaluated data dependencies.
Public/Granted literature
- US20140258686A1 INTEGRATED CIRCUIT, ELECTRONIC DEVICE AND INSTRUCTION SCHEDULING METHOD Public/Granted day:2014-09-11
Information query
