Invention Grant
US09472948B2 On chip reverse polarity protection compliant with ISO and ESD requirements 有权
片上反极性保护符合ISO和ESD要求

On chip reverse polarity protection compliant with ISO and ESD requirements
Abstract:
A semiconductor device is disclosed. In one embodiment a semiconductor device includes a semiconductor chip including a substrate, a ground terminal configured to be provided with a reference potential and a supply terminal electrically coupled to the substrate, the supply terminal configured to be provided with a load current and configured to be provided with a supply voltage between the substrate and the ground terminal. The semiconductor device further comprises an overvoltage protection circuit disposed in the semiconductor chip and coupled between the supply terminal and the ground terminal, the overvoltage protection circuit including a first transistor having a load current path coupled between the supply terminal and an internal ground node and a second transistor having a load current path coupled between the internal ground node and the ground terminal.
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