Invention Grant
US09487396B2 Release chemical protection for integrated complementary metal-oxide-semiconductor (CMOS) and micro-electro-mechanical (MEMS) devices
有权
释放用于集成的互补金属氧化物半导体(CMOS)和微机电(MEMS)器件的化学保护
- Patent Title: Release chemical protection for integrated complementary metal-oxide-semiconductor (CMOS) and micro-electro-mechanical (MEMS) devices
- Patent Title (中): 释放用于集成的互补金属氧化物半导体(CMOS)和微机电(MEMS)器件的化学保护
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Application No.: US14477451Application Date: 2014-09-04
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Publication No.: US09487396B2Publication Date: 2016-11-08
- Inventor: Michael J. Daneman , Fariborz Assaderaghi
- Applicant: INVENSENSE, INC.
- Applicant Address: US CA San Jose
- Assignee: INVENSENSE, INC.
- Current Assignee: INVENSENSE, INC.
- Current Assignee Address: US CA San Jose
- Agency: Amin, Turocy & Watson, LLP
- Main IPC: B81C1/00
- IPC: B81C1/00 ; B81B7/00

Abstract:
Systems and methods that protect CMOS layers from exposure to a release chemical are provided. The release chemical is utilized to release a micro-electro-mechanical (MEMS) device integrated with the CMOS wafer. Sidewalls of passivation openings created in a complementary metal-oxide-semiconductor (CMOS) wafer expose a dielectric layer of the CMOS wafer that can be damaged on contact with the release chemical. In one aspect, to protect the CMOS wafer and prevent exposure of the dielectric layer, the sidewalls of the passivation openings can be covered with a metal barrier layer that is resistant to the release chemical. Additionally or optionally, an insulating barrier layer can be deposited on the surface of the CMOS wafer to protect a passivation layer from exposure to the release chemical.
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