发明授权
- 专利标题: Processing system with low power wake-up pad
- 专利标题(中): 具有低功率唤醒垫的处理系统
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申请号: US14093473申请日: 2013-11-30
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公开(公告)号: US09494987B2公开(公告)日: 2016-11-15
- 发明人: Dzung T. Tran , Rishi Bhooshan , Rakesh Pandey , Fujio Takeda
- 申请人: Dzung T. Tran , Rishi Bhooshan , Rakesh Pandey , Fujio Takeda
- 申请人地址: US TX Austin
- 专利权人: Freescale Semiconductor, Inc.
- 当前专利权人: Freescale Semiconductor, Inc.
- 当前专利权人地址: US TX Austin
- 主分类号: G06F1/26
- IPC分类号: G06F1/26 ; H01L27/02 ; H01L29/06 ; G06F1/32 ; H01L29/786
摘要:
An integrated circuit includes an input/output pad, an input circuit, and an output circuit. The input circuit is coupled to the input/output pad that receives input signals including a wake-up signal that indicates when the integrated circuit is to switch from a power-down mode to an active mode. The output circuit is coupled to the input/output pad that provides output signals to the input/output pad. The output circuit includes a first P channel transistor in a well having a drain coupled to the input/output pad, and a source coupled to a power supply terminal. The power supply terminal receives a first power supply voltage during the active mode and is decoupled from any power supply during the power-down mode. The well is coupled to the wake-up signal in response to the wake-up signal indicating a change from the power-down mode to the active mode.
公开/授权文献
- US20150153811A1 PROCESSING SYSTEM WITH LOW POWER WAKE-UP PAD 公开/授权日:2015-06-04
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