Invention Grant
US09502137B2 Method and device for optimizing log likelihood ratio (LLR) used for nonvolatile memory device and for correcting errors in nonvolatile memory device
有权
用于优化用于非易失性存储器件的对数似然比（LLR）和用于校正非易失性存储器件中的错误的方法和装置
- Patent Title: Method and device for optimizing log likelihood ratio (LLR) used for nonvolatile memory device and for correcting errors in nonvolatile memory device
- Patent Title (中): 用于优化用于非易失性存储器件的对数似然比（LLR）和用于校正非易失性存储器件中的错误的方法和装置
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Application No.: US14205482Application Date: 2014-03-12
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Publication No.: US09502137B2Publication Date: 2016-11-22
- Inventor: Sang-Yong Yoon , Kyung-Ryun Kim , Jin-Young Chun
- Applicant: SAMSUNG ELECTRONICS CO., LTD.
- Applicant Address: KR Suwon-si, Gyeonggi-do
- Assignee: Samsung Electronics Co., Ltd.
- Current Assignee: Samsung Electronics Co., Ltd.
- Current Assignee Address: KR Suwon-si, Gyeonggi-do
- Agency: Volentine & Whitt, PLLC
- Priority: KR10-2013-0028266 20130315
- Main IPC: G11C29/00
- IPC: G11C29/00 ; G11C29/50 ; G06F11/10 ; G11C29/02 ; H03M13/39 ; G11C16/34 ; G11C11/56
Abstract:
In a method of optimizing a log likelihood ratio (LLR) used to correct errors related to data stored in a nonvolatile memory device, variation of threshold voltage distribution for a plurality of memory cells included in the nonvolatile memory device is monitored, and the LLR for the memory cells is updated based on a monitoring result. Although the characteristics of the memory cells are deteriorated, the LLR is continuously maintained to the optimal value.
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