发明授权
- 专利标题： Electrical component testing in stacked semiconductor arrangement
- 专利标题（中）： 层叠半导体布置中的电气元件测试
-
申请号： US14560321申请日： 2014-12-04
-
公开(公告)号： US09502315B2公开(公告)日： 2016-11-22
- 发明人: Shao-Yu Li , Hao-Chieh Chan
- 申请人： Taiwan Semiconductor Manufacturing Company Limited
- 申请人地址： TW Hsin-Chu
- 专利权人： Taiwan Semiconductor Manufacturing Company Limited
- 当前专利权人： Taiwan Semiconductor Manufacturing Company Limited
- 当前专利权人地址： TW Hsin-Chu
- 代理机构： Cooper Legal Group, LLC
- 主分类号： H01L21/66
- IPC分类号： H01L21/66 ; H01L27/06 ; G01R31/26 ; G01R31/28 ; G01R31/3185
摘要：
A stacked semiconductor arrangement is provided. The stacked semiconductor arrangement includes a dynamic pattern generator layer having an electrical component. The arrangement also includes a monitoring layer configured to evaluate electrical performance of the electrical component.
公开/授权文献
信息查询
IPC分类:
