Invention Grant
US09506980B2 Integrated circuit testing architecture 有权
集成电路测试架构

Integrated circuit testing architecture
Abstract:
In accordance with one aspect of the present description, an interface between an integrated circuit device and a test controller for testing the integrated circuit device includes a plurality of boards coupled together. In one embodiment, the test interface includes a plurality of interchangeable auxiliary boards, each having test circuitry, which may be coupled to a primary board and reused as appropriate to test various integrated circuits. Other aspects are described.
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