发明授权
US09515165B1 III-V field effect transistor (FET) with reduced short channel leakage, integrated circuit (IC) chip and method of manufacture
有权
III-V场效应晶体管（FET）具有减少的短沟道泄漏，集成电路（IC）芯片和制造方法
- 专利标题： III-V field effect transistor (FET) with reduced short channel leakage, integrated circuit (IC) chip and method of manufacture
- 专利标题（中）： III-V场效应晶体管（FET）具有减少的短沟道泄漏，集成电路（IC）芯片和制造方法
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申请号： US14850954申请日： 2015-09-11
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公开(公告)号： US09515165B1公开(公告)日： 2016-12-06
- 发明人: Cheng-Wei Cheng , Pranita Kerber , Effendi Leobandung , Amlan Majumdar
- 申请人： International Business Machines Corporation
- 申请人地址： US NY Armonk
- 专利权人： International Business Machines Corporation
- 当前专利权人： International Business Machines Corporation
- 当前专利权人地址： US NY Armonk
- 代理机构： Law Office of Charles W. Peterson, Jr.
- 代理商 Louis J. Percello, Esq.
- 主分类号： H01L29/66
- IPC分类号： H01L29/66 ; H01L29/78 ; H01L29/205
摘要：
Field Effect Transistors (FETs), Integrated Circuit (IC) chips including the FETs, and a method of forming the FETs and IC. FET locations are defined on a layered semiconductor wafer. The layered semiconductor wafer preferably includes a III-V semiconductor surface layer and a buried layer. A gate stack is formed on each FET location. Source/drain regions are sub-etched at each said gate stack. The sub-etched source/drain regions define a channel under each said gate stack. A layered source/drain is formed in each sub-etched source/drain region.
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